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Sockel 1156

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{{#if:Datei:Asus P7P55-M LGA 1156.jpg| {{#if:September 2009| {{#if:LGA| {{#if:1156| {{#if:| {{#if:| {{#if:| {{#if:DDR3| {{#if:1. Nehalem
1. Westmere| {{#if:LGA 775
LGA 771| {{#if:LGA 1155|
{{#if: Sockel 1156| Sockel 1156 | Sockel 1156 }}
Datei:Asus P7P55-M LGA 1156.jpg
Spezifikationen

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Einführung September 2009

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Bauart LGA

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Kontakte 1156

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Busprotokoll {{{Protokoll}}}

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Bustakt {{{FSB}}}

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Betriebs­spannung {{{Volt}}}

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RAM DDR3

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Prozessoren 1. Nehalem
1. Westmere

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Vorgänger LGA 775
LGA 771

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Nachfolger LGA 1155

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Der Sockel 1156 (auch LGA1156 oder Sockel H genannt) ist ein Prozessorsockel für die Prozessorserie Nehalem-Mikroarchitektur Intel Core i3, Core i5 und Core i7.<ref>{{#if:2016-05-24|{{#iferror: {{#iferror:{{#invoke:Vorlage:FormatDate|Execute}}|}}| |}}}}{{#if:Terence Lee|Terence Lee: }}{{#if:https://web.archive.org/web/20160524051302/http://vr-zone.com/articles/intel-replaces-45nm-havendale-w-32nm-clarkdale/6558.html?doc=6558%7C{{#if:Intel Replaces 45nm Havendale w/ 32nm Clarkdale|[{{#invoke:Vorlage:Internetquelle|archivURL|1={{#invoke:URLutil|getNormalized|1=https://web.archive.org/web/20160524051302/http://vr-zone.com/articles/intel-replaces-45nm-havendale-w-32nm-clarkdale/6558.html?doc=6558}}}} {{#invoke:Vorlage:Internetquelle|TitelFormat|titel=Intel Replaces 45nm Havendale w/ 32nm Clarkdale}}]{{#if:| ({{{format}}})}}{{#if:| {{{titelerg}}}{{#invoke:Vorlage:Internetquelle|Endpunkt|titel={{{titelerg}}}}}}}}}|{{#if:http://vr-zone.com/articles/intel-replaces-45nm-havendale-w-32nm-clarkdale/6558.html?doc=6558%7C{{#if:{{#invoke:TemplUtl%7Cfaculty%7C1}}%7C{{#invoke:Vorlage:Internetquelle%7CTitelFormat%7Ctitel={{#invoke:WLink%7CgetEscapedTitle%7C1=Intel Replaces 45nm Havendale w/ 32nm Clarkdale}}}}|[{{#invoke:URLutil|getNormalized|1=http://vr-zone.com/articles/intel-replaces-45nm-havendale-w-32nm-clarkdale/6558.html?doc=6558}} {{#invoke:Vorlage:Internetquelle|TitelFormat|titel={{#invoke:WLink|getEscapedTitle|1=Intel Replaces 45nm Havendale w/ 32nm Clarkdale}}}}]}}{{#if:| ({{{format}}}{{#if:1VR-ZONE2009-02-10https://web.archive.org/web/20160524051302/http://vr-zone.com/articles/intel-replaces-45nm-havendale-w-32nm-clarkdale/6558.html?doc=6558{{#if: 2023-09-21 | {{#if:{{#invoke:TemplUtl|faculty|}}||1}}}} 

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        {{#invoke:Vorlage:Internetquelle|archivBot|stamp={{{archiv-bot}}}|text={{#if:https://web.archive.org/web/20160524051302/http://vr-zone.com/articles/intel-replaces-45nm-havendale-w-32nm-clarkdale/6558.html?doc=6558%7CVorlage:Webarchiv/archiv-bot}}

}}}}{{#invoke:TemplatePar|check |all= url= titel= |opt= autor= hrsg= format= sprache= titelerg= werk= seiten= datum= abruf= zugriff= abruf-verborgen= archiv-url= archiv-datum= archiv-bot= kommentar= zitat= AT= CH= offline= |cat= {{#ifeq: 0 | 0 | Wikipedia:Vorlagenfehler/Vorlage:Internetquelle}} |template= Vorlage:Internetquelle |format=0 |preview=1 }}</ref> Sein inkompatibler Nachfolger ist der Sockel 1155.

Der Übergang von der Core- auf die Nehalem-Mikroarchitektur erforderte einen neuen Sockel. Bei Prozessoren für den Sockel 1156 sind der Speichercontroller und der PCIe-Controller im Prozessor integriert. Der Sockel muss dementsprechend zusätzliche Anschlüsse für den Speicherbus und PCIe-Lanes bereitstellen. Durch die Integration des für breitbandige Datentransfers vorgesehenen PCIe-Controllers auf den CPU-Chip erübrigt sich eine Northbridge für diese Aufgabe. An die CPU wird deswegen nur noch eine leicht modifizierte Southbridge angebunden, die als Intel Platform Controller Hub (PCH) bezeichnet wird. Der PCH wird, wie bei Intels Southbridges üblich, mit einem Direct Media Interface (DMI) angebunden.<ref>{{#if:2009-10-07|{{#iferror: {{#iferror:{{#invoke:Vorlage:FormatDate|Execute}}|}}| |}}}}{{#if:|{{{autor}}}: }}{{#if:https://web.archive.org/web/20091007022850/http://www.intel.com/Assets/PDF/datasheet/322169.pdf%7C{{#if:Intel 5 Series Chipset and Intel 3400 Series Chipset: Datasheet|[{{#invoke:Vorlage:Internetquelle|archivURL|1={{#invoke:URLutil|getNormalized|1=https://web.archive.org/web/20091007022850/http://www.intel.com/Assets/PDF/datasheet/322169.pdf}}}} {{#invoke:Vorlage:Internetquelle|TitelFormat|titel=Intel 5 Series Chipset and Intel 3400 Series Chipset: Datasheet}}]{{#if:PDF; 4,8 MB| (PDF; 4,8 MB)}}{{#if:| {{{titelerg}}}{{#invoke:Vorlage:Internetquelle|Endpunkt|titel={{{titelerg}}}}}}}}}|{{#if:http://www.intel.com/Assets/PDF/datasheet/322169.pdf%7C{{#if:{{#invoke:TemplUtl%7Cfaculty%7Cja}}%7C{{#invoke:Vorlage:Internetquelle%7CTitelFormat%7Ctitel={{#invoke:WLink%7CgetEscapedTitle%7C1=Intel 5 Series Chipset and Intel 3400 Series Chipset: Datasheet}}}}|[{{#invoke:URLutil|getNormalized|1=http://www.intel.com/Assets/PDF/datasheet/322169.pdf}} {{#invoke:Vorlage:Internetquelle|TitelFormat|titel={{#invoke:WLink|getEscapedTitle|1=Intel 5 Series Chipset and Intel 3400 Series Chipset: Datasheet}}}}]}}{{#if:PDF; 4,8 MB| (PDF; 4,8 MB{{#if:jaIntel2009-09https://web.archive.org/web/20091007022850/http://www.intel.com/Assets/PDF/datasheet/322169.pdf{{#if: 2023-09-21 | {{#if:{{#invoke:TemplUtl|faculty|}}||1}}}} 

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Serie 5-Chipsatz

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            |{{#invoke:DateTime|format|{{{datum}}}|T._Monat JJJJ}}
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H55<ref>Intel H55 Express-Chipsatz</ref> P55<ref>Intel P55 Express-Chipsatz</ref> H57<ref>Intel H57 Express-Chipsatz</ref> Q57<ref>Intel Q57 Express-Chipsatz</ref>
Übertaktung Ja Nein
CPU-Unterstützung Nehalem und Westmere
Speicherunterstützung RAM DDR3
ECC Nein
USB 2.0-Anschlüsse 12 14
SATA 3-Gbit/s-Anschlüsse 6
PCIe-Unterstützung
(maximal) 		2.0 (CPU) 1×16
2.0 (PCH) 6 8
Unterstützte Bildschirme 2 - 2
RAID-Unterstützung Nein
Intel-Anti-Theft-Technologie Nein Ja
Intel-Trusted-Execution
und vPro-Technologie 		Nein Ja
Maximale Verlustleistung TDP 5,2 W 4,7 W 5,2 W 5,1 W
Fertigungsprozess 65 nm
Markteinführung Q1 2010 Q3 2009 Q1 2010

Siehe auch

Weblinks

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Einzelnachweise

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